查看: 177|回复: 3

Jetson.GPIO with MIIVII Evo Xavier

[复制链接]

2

主题

4

帖子

28

积分

办事员

Rank: 1

积分
28
发表于 2021-2-8 22:54:36 | 显示全部楼层 |阅读模式
Ni hao, hello,

we're trying to use the Jetson.GPIO Python library with the MIVII EVO Xavier. Unfortunately this does not work (out of the box). How can we use Python (and if possible the very useful Jetson.GPIO library (https:/ /github.com/NVIDIA/jetson-gpio)) with the new device?

This would in my opinion be a very useful addition for many customers to use the DI/DO ports with Python.

Best regards!
tfc.ai
回复

使用道具 举报

0

主题

92

帖子

200

积分

科长

Rank: 3Rank: 3

积分
200
发表于 2021-2-8 23:27:04 | 显示全部楼层
Hi

For DO port, the GPIO port on chip is mentioned here.
https://docs.miivii.com/product/ ... /03.interfaces.html
Since python library is also manipulate the device node, if the Jetson.GPIO is not written too bad, you should be able to use it. (But sorry we don't maintain it and can't check more.)
It's open drain, hardware connection should be mentioned.

For DI port, it should also work if Jetson.GPIO can manipulate the specific device node.
Pin mapping is also mentioned in the above link.

Our suggest procedure is:
https://docs.miivii.com/product/ ... ommon/02.EN_io.html
1. use the way manual mentioned, to make sure hardware connection is good.
2. use python to wrap device node operation

The repo you mentioned seems only for dev kit.
Since dev kit only have 1.8/3.3V gpio for test, and only little GPIO there, I'm not sure whether it can let you change GPIO pin freely.
回复

使用道具 举报

2

主题

4

帖子

28

积分

办事员

Rank: 1

积分
28
 楼主| 发表于 2021-2-9 12:57:47 | 显示全部楼层
Thank you for the quick response. With a little knowledge from your side I'm sure we could write a patch / pull request for the Jetson.GPIO software and also enable it for your MIIVII Evo Xavier.

If you look at https://github.com/NVIDIA/jetson ... IO/gpio_pin_data.py you can see that only little knowledge about the pinmux is required and the Jetson.GPIO support could be easily added for the benefit of a lot of your users. This is the required information according to the source code:
  1. # These arrays contain tuples of all the relevant GPIO data for each Jetson
  2. # Platform. The fields are:
  3. # - Linux GPIO pin number (within chip, not global),
  4. #   (map from chip GPIO count to value, to cater for different numbering schemes)
  5. # - Linux exported GPIO name,
  6. #   (map from chip GPIO count to value, to cater for different naming schemes)
  7. #   (entries omitted if exported filename is gpio%i)
  8. # - GPIO chip sysfs directory
  9. # - Pin number (BOARD mode)
  10. # - Pin number (BCM mode)
  11. # - Pin name (CVM mode)
  12. # - Pin name (TEGRA_SOC mode)
  13. # - PWM chip sysfs directory
  14. # - PWM ID within PWM chip
  15. # The values are used to generate dictionaries that map the corresponding pin
  16. # mode numbers to the Linux GPIO pin number and GPIO chip directory
复制代码


If you can provide me with this I can try to write and make available as Open Source the code for your users.
回复

使用道具 举报

0

主题

92

帖子

200

积分

科长

Rank: 3Rank: 3

积分
200
发表于 2021-2-9 17:45:52 | 显示全部楼层
miivii_tfc 发表于 2021-2-9 12:57
Thank you for the quick response. With a little knowledge from your side I'm sure we could write a p ...

Hi

Due to the Chinese festival, our company will on leave from 8th Feb to 18th Feb.
The following is per my understanding, we don't have engineer to check with Nvidia during the holiday.

# These arrays contain tuples of all the relevant GPIO data for each Jetson
# Platform. The fields are:
# - Linux GPIO pin number (within chip, not global),
#   (map from chip GPIO count to value, to cater for different numbering schemes)
It's mentioned here.
https://docs.miivii.com/product/ ... /03.interfaces.html

# - Linux exported GPIO name,
#   (map from chip GPIO count to value, to cater for different naming schemes)
#   (entries omitted if exported filename is gpio%i)
We didn't remap the name, not sure whether this is valid or not.

# - GPIO chip sysfs directory
This part is mentioned here.
https://docs.miivii.com/product/ ... ommon/02.EN_io.html

# - Pin number (BOARD mode)
# - Pin number (BCM mode)
# - Pin name (CVM mode)
# - Pin name (TEGRA_SOC mode)
# - PWM chip sysfs directory
# - PWM ID within PWM chip
# The values are used to generate dictionaries that map the corresponding pin
# mode numbers to the Linux GPIO pin number and GPIO chip directory
For this part, I'm sorry, we don't know what it means in this lib...
I checked the python code as well, but still don't know what Nvidia is saying.

回复

使用道具 举报

您需要登录后才可以回帖 登录 | 点我注册

本版积分规则


快速回复 返回顶部 返回列表